A dual layer semiconductor channel employed for vertical memory devices provides the benefit of protecting an underlying memory film, and particularly the tunneling dielectric therein, during an anisotropic etch that removes a bottom portion of the memory film to physically expose surfaces of a semiconductor substrate that includes horizontal portions of semiconductor channels. A first semiconductor channel layer is deposited prior to the anisotropic etch over the tunneling dielectric, and a second semiconductor channel layer is deposited after the anisotropic etch directly on a surface of the semiconductor substrate and on remaining vertical portions of the first semiconductor channel layer. A semiconductor channel including vertical portions of the first semiconductor channel layer and the second semiconductor channel layer includes an interface between the two semiconductor channel layers. The interface between the two semiconductor channel layers may generate interface states, which scatter charge carriers in the semiconductor channel, and reduce the mobility of charge carriers and the on-current of the vertical memory device.